Wednesday, March 28, 2012
Serial Communication Basics
Watchdog Timer
The watchdog timer keeps track of the embedded program execution.
This is a register where some value is to be feed at regular intervals otherwise it will generate a reset .
General purpose computers does not have a watchdog but embedded systems had watchdog which monitors the program execution otherwise reset the program automatically
A COP (computer operating properly) or watchdog timer checks for runaway code execution. In
general, watchdog timers must be turned on once within the first few cycles after reset. Software
must then periodically reset the watchdog during execution.
If processor execution has gone off the track, it is unlikely that the watchdog will be reset reliably. It
is this exact state that needs to be fixed: an indirect jump to an unexpected address could be the
cause. A loop polling for external signals that are never received is also a possible cause.
The watchdog timeout can cause the processor to go to a known state, usually the RESET state, or to
execute an interrupt. The hardware implementation of watchdog timers varies considerably between
different processors. Some watchdog timers can be programmed for different time-out delays.
In C, the sequence to reset the watchdog can be as simple as assigning to a port.
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